數(shù)字電路英文版第六單元

1、CHAPTER 6 Carry generation ( 產(chǎn)生進(jìn)位產(chǎn)生進(jìn)位 ) Cascading ( 串級串級 ) Carry propagation ( 進(jìn)位傳送進(jìn)位傳送 ) Decoder ( 譯碼器譯碼器 ) Code converter ( 代碼變換代碼變換 )Demultiplexer ( DEMUX ) ( 數(shù)據(jù)分配數(shù)據(jù)分配 )Dependence notation ( 相關(guān)符號相關(guān)符號 ) Encoder ( 編碼器編碼器 ) Even parity ( 偶校驗(yàn)偶校驗(yàn) ) Date selector ( 數(shù)據(jù)選擇數(shù)據(jù)選擇 )Full-adder ( 全加器全加器 ) Glitc

2、h ( 毛刺毛刺 ) Half-adder ( 半加器半加器 )Look-ahead carry ( 超前進(jìn)位超前進(jìn)位 ) Multiplexer ( MUX ) ( 數(shù)據(jù)選擇數(shù)據(jù)選擇 )Nibble ( 四位四位 ) Strobing ( 選通選通 ) Odd parity ( 奇校驗(yàn)奇校驗(yàn) ) Parity bit ( 奇偶校驗(yàn)位奇偶校驗(yàn)位 ) Parity encoder ( 奇偶編碼奇偶編碼 ) Ripple carry ( 紋波進(jìn)位紋波進(jìn)位 ) Pull-up resistor ( 上拉電阻上拉電阻 ) Zero suppression ( 滅零滅零 )KEY TERMSCarry

3、generation The process of producing an output carry in a full-adder when both input bits are 1s.Carry propagation The process of rippling an input carry to become an output carry in a full-adder when either or both of the input bits are 1s and the input carry is a 1.Cascading Connecting the output o

4、f one device to the input of a similar device, allowing one device to drive another in order to expand the operational capability.Code converter A digital device that converts one type of coded information into another coded form.Data selector A circuit that selects data from several inputs one at a

5、 time in a sequence and places them on the output; also called a multiplexer.Decoder A digital circuit that converts coded information into a familiar or noncoded form.Demultiplexer (DEMUX) A circuit that switches digital data from one input line to several output lines in a specified time sequence.

6、Encoder A digital circuit that converts information to a coded form.Even parity The condition of having an even number of 1s in every group of bits.Full-adder A digital circuit that adds two bits and an input carry to produce a sum and an output carry.Glitch A voltage or current spike of short durat

7、ion, usually unintentionally produced and unwanted.Half-adder A digital circuit that adds two bits and produces a sum and an output carry.Look-ahead carry A method of binary addition whereby carries from preceding adder stages are anticipated, thus eliminating carry propagation delays.Multiplexer (M

8、UX) A circuit that switches digital data from several input lines onto a single output line in a specified time sequence.Nibble A groub of four bits.Odd parity The condition of having an odd number of 1s in every group of bits.Parity bit A bit attached to each group of information bits to make the t

9、otal number of 1s odd or even for every group of bits.Priority encoder An encoder in which only the highest value input digit is encoded any other active input is ignored.Pull-up resistor A resistor with one end connected to the dc supply voltage used to keep a given point in a circuit HIGH when in

10、the inactive state.Ripple carry A method of binary addition in which the output carry from each adder becomes the input carry of the next higher-order adder.Strobing A process of using a pulse to sample the occurrence of an event at a specified time in relation to the event.Zero suppression The proc

11、ess of blanking out leading or trailing zeros in a digital display.Adder are important not only in computer, but in many types of digital systems in which numerical data are processed. An understanding of the basic adder operation is fundamental to the study of digital systems. In this section, the

12、half-adder and the full-adder are introduced.2.The Half-AdderThe half-adder accepts two binary digits on its inputs and produces two binary digits on its outputs, a sum bit and a carry bit. ABCoutSumCarryInput bits3.0 + 0 = 00 + 1 = 11 + 0 = 11 + 1 = 10AB = A + B Cout = A B4. 0 0 0 0 0 1 0 1 1 0 0 1

13、 1 1 1 0 A B Cout = A + B Cout = A BThe Full-AdderThe Full-adder accepts two input bits and an input carry and generates a sum output and an output carry. ABCoutSumOutputcarryCinInputbitsInput carry5.A B 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1CinCout = (A + B)

14、 + Cout =AB + Cin(A + B) Cin6. ABC000111100 11111 =ABCin+ABCin+ABCin+ABCin =A(BCin+BCin)+A(BCin+BCin) =A ( B + Cin )+ A ( B + ) Cin = (A + B) + Cin ABC000111100 111Cout=AB+ABCin+ABCin =AB +(AB+AB)Cin =AB+(A + B)Cin11CinACinCoutBABAB=(A+B)+C(A + B)(A + B)(A + B)Cin Cout =AB + Cin(A + B )7.ABCoutABCou

15、tAB(A + B)(A+B)+ Cin(A+B) CinInput carry,Cin Cout =AB + Cin(A + B )AB8.A B 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 0 1 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 0 0 1 1 1 1 1Ci-1CiDD = (A + B) + Ci = AB + Ci-1(A + B) Ci-1 ABC000111100 11111 =ABCi-1+ABCi-1+ABCi-1+ABCi-1 =A(BCi-1+BCi-1)+A(BCi-1+BCi-1) =DA ( B + Ci-1 )+ A

16、 ( B + ) Ci-1 = (A + B) + Ci-1 ABC000111100 11Ci =AB+ABCi-1+ABCi-1 =AB +(AB+AB)Ci-1 =AB+(A + B)Ci-1111Ci-1ACi-1CiBABABD=(A+ B)+Ci-1(A + B)(A + B)(A + B)Ci-1 Ci =AB + Ci-1(A + B )D7.Two or more full-adders are connected to form parallel binary adders. In this section, you will learn the basics of thi

17、s type of adder so that you will understand all the necessary input and output functions when working with these devices.9.A BCoutA1CinA BCoutCinB1A2B22(MSB) 31 (LSB)0 11 + 01 100 A2A1 + B2B1 3 2110.Four-Bit Parallel AddersA BCoutA3CinA BCoutCinB3A4B443A BCoutA1CinA BCoutCinB1A2B221CoC4C3C2C111.4123

18、A12341234C0C4BBinaryNumber ABinaryNumber B4-bitsumInput carryoutput carryLogic symbol12.Truth Table for a 4-Bit Parallel Adder 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Cn-1 An Bn n Cn13.MSI Adders123412341234ABCoutCinB8A8A7A6A5B7B6B5C88765123412341234ABCoutCinB

19、4A4A3A2A1B3B2B14321C0Cascading of 4-bit adders to from 8-bit adders14.4 3 2 14 3 2 1 Cin4 3 2 1ABCout4 3 2 14 3 2 1 Cin4 3 2 1ABCout4 3 2 1 4 3 2 1 Cin4 3 2 1ABCout4 3 2 14 3 2 1 Cin4 3 2 1ABCoutA4 A2 A3 A1A16A14 A15 A13A12 A10 A11 A9A8 A6 A7 A5B4 B2 B3 B1B8 B6 B7 B5B12 B10 B11 B9B16 B14 B13 B12 3 1

20、 4 2 7 5 8 6 11 9 12 10 15 13 16 14C16015.ABCoutCinABCoutCinABCoutCinABCoutCin4123A123123C0C4B444123A123123C0C4B447-segdecoderBCDto7-segdecoderBCDtoYESNOYESNOYESNOYESNOYESNOYESNOParallel adder 1Parallel adder 2Full adder 1Full adder 2Full adder 3Full adder 4VCCYESNOThe basic function of a comparator

21、 is to compare the magnitudes of two binary quantities to determine the relationship of those quantities. In its simplest form, a comparator circuit determines whether two numbers are equal.16.Equality001001110011The input bits are equal.The input bits are equal.The input bits are not equal.The inpu

22、t bits are not equal.17.A0B0A1B1LSBsMSBsG1G2A=BHIGH indicate equality.18.Inequality4123A1234ABA0A1A2A3B0B1B2B319.FAB = ABFABFA=BFAQ, P=Q, and PQP1P2P3Q1Q2Q311011010P=QPQ62.23. What must be done in Fig. 6-5 in order to use two 7485 4-bit comparators to compare two 8-bit numbers?a. The PQ outputs of C

23、OMP A must be connected to the same outputs of COMP B.b. The PQ outputs of COMP A must be connected to the inputs of COMP B. c. The = input of COMP A must be connected to Vcc, and the inputs must be connected to ground. d. Both b and c are correct.P0Q07485PQP0Q07485PQ=Fig. 6-5P0Q07485PQP0Q07485PQ=Fi

24、g. 6-5Vcc24. Which statement below best describes the function of a decoder? a. A decoder will convert a decimal number into the proper binary equivalent. b. A decoder will convert a binary number into a specific output representing a particular character or digit.c. Decoders are used to prevent improper operation of digital systems.d. D