《信息科學類專業(yè)英語》課件第7章

Lesson7ConfigurableComputing(第七課可重構計算)

Vocabulary(詞匯)ImportantSentences(重點句)QuestionsandAnswers(問答)Problems(問題)ReadingMaterial(閱讀材料)

Computersthatmodifytheirhardwarecircuitsastheyoperateareopeninganeweraincomputerdesign.Becausetheycanfilterdatarapidly,theyexcelatpatternrecognition,imageprocessingandencryption

Computerdesignersfaceaconstantstruggletofindtherightbalancebetweenspeedandgenerality.Theycanbuildversatilechipsthatperformmanydifferentfunctionsrelativelyslowly,ortheycandeviseapplication-specificchipsthatdoonlyalimitedsetoftasksbutdothemmuchmorequickly.Microprocessors(suchastheIntelPentiumorMotorolaPowerPCchipscommonlyfoundinpersonalcomputers)aregeneralpurpose:programminginstructionsencodedinbinaryformatcanleadamicroprocessorthroughvirtuallyanylogicalormathematicaloperationaprogrammercanconceive.TheIntelPentium,forexample,wasneverdesignedspecificallytoexecuteeitherMicrosoftWordorthecomputergameDOOM,butitcanrunboth.[1]1ConfigurableComputing

Incontrast,customhardwarecircuits,oftenknownasApplication-SpecificIntegratedCircuits(ASICs),providepreciselythefunctionalityneededforaspecifictask.BycarefullytuningeachASICtoagivenjob,thecomputerdesignercanproduceasmaller,cheaper,fasterchipthatconsumeslesspowerthanaprogrammableprocessor.AcustomgraphicschipforaPC,forinstance,candrawlinesorpaintpicturesonthescreen10or100timesasquicklyasageneral-purposecentralprocessingunitcan.[2]

Asdesignersmaketheirchoicesbetweenversatilityandspeed,theymustalsoconfronttheissueofcost.Awell-designedASICwillsolvethespecificproblemforwhichitwasdesigned,butprobablynotaslightlymodifiedproblemintroducedaftertheASICdesignisfinished.Furthermore,evenifamodifiedASICcanbedevelopedforthenewproblem,theoriginalhardwarecircuitsmaybetoohighlycustomizedtobereusedinsuccessivegenerations.Asaresult,theengineeringeffortrequiredtodesignandbuildanASICmustbeamortizedoverarelativelysmallnumberofunits.2ProgrammableCircuitry

Anewdevelopmentinintegratedcircuitsoffersathirdoption:large,fast,field-programmablegatearrays,orFPGAs—highlytunedhardwarecircuitsthatcanbemodifiedatalmostanypointduringuse.FPGAsconsistofarraysofconfigurablelogicblocksthatimplementthelogicalfunctionsofgates.Logicgatesarelikeswitcheswithmultipleinputsandasingleoutput.TheyareusedindigitalcircuitstoperformbasicbinaryoperationssuchasAND,NAND,OR,NORandXOR.Inmosthardwarethatisusedincomputingtoday,thelogicalfunctionsofgatesarefixedandcannotbemodified.

InFPGAs,however,boththelogicfunctionsperformedwithinthelogicblocksandtheconnectionsbetweentheblockscanbealteredbysendingsignalstothechip.TheseblocksarestructurallysimilartothegatearraysusedinsomeASICs,butwhereasstandardgatearraysareconfiguredduringmanufacture,theconfigurablelogicblocksinFPGAscanberewiredandreprogrammedrepeatedly,longaftertheintegratedcircuithasleftthefactory.[3]

ThekeythathasopenedthedoortoconfigurablecomputingisthedesignofnewFPGAsthatcanbeconfiguredextremelyquickly.Theearliestfield-programmablearraysrequiredseveralsecondsormoretochangetheirconnections—perfectlysuitableforengineerswhowantedtotestalternativecircuitdesignsorforcompaniesthatsolddevicesthatmightneedoccasionalupgrading.NewerFPGAscanbeconfiguredinonemillisecond,andweexpecttoseedeviceswithconfigurationtimesaslowas100microsecondswithintwoyears.Ultimately,computingdevicesmaybeabletoadapttheirhardwarealmostcontinuouslyinresponsetochangesintheinputdataorprocessingenvironment.

TherearemanyvariationsonFPGAdesign,butthebasicstructureconsistsofalargenumberofconfigurablelogicblocksandaprogrammablegridofconnectionsthatcanlinkthoseblocksinanypatternthedesignerchooses.ThoseFPGAsthatarecoarsegrainedhaveasmallnumberofpowerfulconfigurablelogicblocks;thosewithafiner-grainedstructurehavemanysimpleblocks.Asingleelementinacoarse-grainedFPGAmightbecapableofaddingorcomparingtwonumbers.Oneblockinafine-graineddevicemightbecapableonlyofcomparingtwobinarydigits—ineffect,itwouldbeasinglelogicgate.Adesignermightchoosetostartwitheitheracoarse-graintedorfine-grainedchipdependingontheapplicationathandandtheamountoftimeavailableforbuildingcomplexsubsystemsfromscratch.

Computingdevicescanmakeuseofconfigurableelementsinmanydifferentways.Theleastdemandingtechniqueistoswitchbetweenfunctionsoncommand—thehardwareequivalentofquittingoneprogramandthenrunninganother.Slowreconfiguration,ontheorderofseveralseconds,maywellbeacceptableinsuchanapplication.Fasterprogrammingtimespermitdynamicdesignswapping:asingleFPGAperformsaseriesoftasksinrapidsuccession,reconfiguringitselfbetweeneachone.

Suchdesignsoperatethechipinatime-sharingmodeandswapbetweensuccessiveconfigurationssorapidlythatitappearstheFPGAisperformingallitsfunctionsatonce.[4]Usingthisapproach,wehavebuiltasingle-chipvideotransmissionsystemthatreconfiguresitselffourtimespervideoframe.ItthusrequiresonlyaquarterofthehardwarethatwouldbeneededforafixedASIC.TheFPGAfirststoresanincomingvideosignalinmemory,thenappliestwodifferentimage-processingtransformationsandfinallytransformsitselfintoamodemtosendthesignalonward.

Themostchallengingandpotentiallymostpowerfulformofconfigurablecomputinginvolvesthehardwarereconfiguringitselfontheflyasitexecutesatask,refiningitsownprogrammingforimprovedperformance.Animage-recognitionchipmighttuneitselfinresponsetoatentativeidentificationoftheobjectitislookingat:ifanimagecontainedacaroratruck,partsofthecircuitryoriginallyintendedfortrackinghigh-speedaircraftorslow-movingpeoplecouldbereconfiguredtofocusinsteadonlandvehicles.Forsomeapplications,sucharadicaldeparturefromtraditionalcomputerdesign,inwhichthehardwareisspecifiedattheoutset,couldmakeformuchfasterandmoreversatilemachinesthanarepossiblewitheithergeneral-purposemicroprocessorsorcustomchips.3CuttingCriticalHardware

Oneofthemostpromisingapplicationsforconfigurablecomputinginvolvespatternmatching.Patternmatchingisusedintaskssuchashandwritingrecognition,faceidentification,databaseretrievalandautomatictargetrecognition.Afundamentaloperationofpatternmatchinginvolvescomparinganinputsetofbits(representinganimage,astringofcharactersorotherdata)withasetoftemplatescorrespondingtothepossiblepatternstoberecognized.Thesystemdeclaresrecognitionwhenthenumberofinputbitsthatmatchbitsinthetemplateexceedssomethreshold.[5]

Inthecaseoftargetrecognition—amilitaryapplicationthatdrovesomeofourinitialwork—thegreatestchallengeistherapidcomparisonofaninputimagetothousandsoftemplates.Atemplatecouldrepresent,forexample,afrontorsideviewofaspecifictypeofvehicle.Eachimagetypicallycontainsthousandsofpixels(pictureelements),andatargetcouldappearatanypositionwithinanimage.Torecognizetargetsfastenoughformilitaryapplications,asystemneedstoperformcomparisonsattherateofseveraltrillionoperationspersecond,becauseallthepixelsintheinputimagemustbecomparedwithallthepixelsinmanytemplates.

WithsupportfromtheDefenseAdvancedResearchProjectsAgency(DARPA),wehavebuiltaprototyperecognitionsystemwithconfigurablehardwarethatachievessignificanthardwaresavingsbytuningitselftoeachtemplateinturn.Manyofthepixelsinatypicaltemplatedonotcontributetothematchingresults,andsotheconfigurablecomputingmachinecouldsimplyomitthemfromitscalculations.Aconventionalsystemcouldnoteasilypareitselfdowninasimilarway,becausethepixelstobeignoreddifferfromtemplatetotemplate.

Onecangofurtherinexploitingtheflexibilityofconfigurablemachinesbytuningthehardwaretotakeadvantageofsimilaritiesamongtemplates.Theconfigurablehardwarecanprocessasetoftemplatesinparallel,usingonlyonecomparisonunitforeachpixelwhosevalueisthesamefortemplatesinthatset.Forexample,ratherthanhavingeightseparatehardwarecircuitsconsideracertainpixelforeightdifferenttemplates,asinglecircuitcanconsiderthepixelandthenpropagateitsoutcometothesevenothertemplates.

Mostrecently,wehavebuiltaprototypeencryptionsystem(alsofundedbyDARPA)thattakesadvantageofconfigurablehardware.AnFPGAimplementstheDataEncryptionStandard(DES),whichuses56-bit-longkeystoencrypt64-bit-longblocksofdata.(Akeyinencryptionisanumberusedtoscrambleorunscrambleaconfidentialmessage.)DESencryptionusuallyproceedsintwosteps:subkeyschedulinganddataprocessing.

Inthefirststep,asetofrotationsandpermutationstranslatesthe56-bitencryptionkeyintoaseriesof16subkeys.Eachsubkeythenprocessesthedatainaseparateround;afullsetof16roundsencryptsordecryptseach64-bitblock.Whenthecomputerdealsconcurrentlywithmultipleusers,eachdialoguebetweenusersmusthaveadistinctkey,andtheencryptionhardwarewillchangekeysaspartsofmessagesarrivefordifferentusers.

InmanyapplicationsofDES,theencryptionkeyremainsconstantwhilealongblockofdatapassesthroughthedatapath.Forexample,iftwopeoplearecommunicatingoverasecurenetwork,theyexchangeasecureencryptionkeyonceandthenusethatkeythroughoutthedurationoftheirdialoguetogeneratethesubkeysforeachroundofencryptionordecryption.SomeASICsaredesignedtohandleonlyonekindofencryptionalgorithm,suchasDES;others—suchasprogrammabledigitalsignalprocessors—arecapableofimplementingmanyencryptionalgorithms.

Withaconfigurablechip,thesoftwarecancalculatethesubkeyvaluesonce,andthedata-processingcircuitrycanbeoptimizedforthosespecificsubkeys.Thisapproachallowsthesubkey-schedulinghardwaretobecompletelyremovedfromthesystem.ThesesavingshaveallowedustoimplementtheDESalgorithmina13,000-gateFPGA,insteadofthe25,000-gatecircuitpreviouslyrequired.Whentheencryptionkeymustbechanged,theusercanquicklyspecifyanewcircuit,customizedtothenewkey,anddownloadittotheFPGA.

Thetarget-recognitionandencryptionprototypeswehavebuilthelpillustratetheenormousflexibilitythatariseswhenthehardwareinacomputercanbecustomizedtoadiverseandchangingsetofexternaldata.Therearemanyotherapplicationsthatcouldbenefitfromtheabilitytomodifythecomputationhardwareinthismanner,includingdigitalcommunications,designautomationanddigitalfilteringforradar.4TheFutureofConfigurableComputing

Configurablecomputingisstillanextremelyyoungfield.AlthoughGeraldEstrinoftheUniversityofCaliforniaatLosAngelesproposedconfigurablecomputinginthelate1960s,thefirstdemonstrationsdidnotoccuruntilafewyearsago,andcurrentFPGAs,withupto100,000logicelements,stilldonotcomeclosetoexploitingthefullpossibilitiesofthetechnique.

FutureFPGAswillbemuchlarger;aswithmanyotherintegratedcircuits,thenumberofelementsonasingleFPGAhasdoubledroughlyevery18months.Beforethedecadeisout,weexpecttoseeFPGAsthathaveamillionlogicelements.Suchchipswillhavemuchbroaderapplication,includinghighlycomplexcommunicationsandsignal-processingalgorithms.

Academicresearchersandmanufacturersareovercomingnumerousotherdesignlimitationsthathavehinderedtheadoptionofconfigurablecomputing.Notallcomputationscanbeimplementedefficientlywithtoday’sFPGAs:theyarewellsuitedtoalgorithmscomposedofbit-leveloperations,suchaspatternmatchingandintegerarithmetic,buttheyareillsuitedtonumericoperations,suchashigh-precisionmultiplicationorfloating-pointcalculations.

DedicatedmultipliercircuitssuchasthoseusedinmicroprocessoranddigitalsignalchipscanbeoptimizedtoperformmoreefficientlythanmultipliercircuitsconstructedfromconfigurablelogicblocksinanFPGA.Furthermore,FPGAscurrentlyprovideverylittleon-chipmemoryforstorageofintermediateresultsincomputations;thus,manyconfigurablecomputingapplicationsrequirelargeexternalmemories.ThetransferofdatatoandfromtheFPGAincreasespowerconsumptionandmayslowdownthecomputations.[6]

Fortunately,researchersaredevelopingadvancedFPGAsthatcontainmemory,arithmeticprocessingunitsandotherspecial-purposeblocksofcircuitry.AndréDeHonandThomasF.Knight,Jr.,oftheMassachusettsInstituteofTechnologyhaveproposedanFPGAthatstoresmultipleconfigurationsinaseriesofmemorybanks.Inasingleclockcycle,whichisontheorderoftensorhundredsofnanoseconds,thechipcouldswaponeconfigurationforanotherconfigurationwithouterasingpartiallyprocesseddata.

MeanwhileBradL.HutchingsofBrighamYoungUniversityhasusedconfigurablecomputingtobuildaDynamicInstructionSetComputer(DISC),whicheffectivelymarriesamicroprocessortoanFPGAanddemonstratesthepotentialofautomaticreconfigurationusingstoredconfigurations.Asaprogramruns,theFPGArequestsreconfigurationifthedesignatedcircuitisnotresident.DISCallowsadesignertocreateandstorealargenumberofcircuitconfigurationsandactivatethemmuchasaprogrammerwouldinitiateacalltoasoftwaresubroutineinamicroprocessor.

TheColtGroup,ledbyPeterM.AthanasofVirginiaPolytechnicInstituteandStateUniversity,isinvestigatingarun-timereconfigurationtechniquecalledWormholethatlendsitselftodistributedcomputing.Theunitofcomputingisastreamofdatathatcreatescustomlogicasitmovesthroughthereconfigurablehardware.

JohnWawrzynekandhiscolleaguesattheUniversityofCaliforniaatBerkeleyaredevelopingsystemsthatcombineamicroprocessorandanFPGA.SpecialcompilersoftwarewouldtakeordinaryprogramcodeandautomaticallygenerateacombinationofmachineinstructionsandFPGAconfigurationsforthefastestoverallperformance.ThisapproachtakesadvantageofopportunitiestointegrateaprocessorandanFPGAonasinglechip.

FPGAswillneverreplacemicroprocessorsforgeneral-purposecomputingtasks,buttheconceptofconfigurablecomputingislikelytoplayagrowingroleinthedevelopmentofhigh-performancecomputingsystems.ThecomputingpowerthatFPGAsofferwillmakethemthedevicesofchoiceforapplicationsinvolvingalgorithmsinwhichrapidadaptationtotheinputisrequired.

Inaddition,thelinebetweenprogrammableprocessorsandFPGAswillbecomelessdistinct:futuregenerationsofFPGAswillincludefunctionssuchasincreasedlocalmemoryanddedicatedmultipliersthatarestandardfeaturesoftoday’smicroprocessors;therearealsonext-generationmicroprocessorsunderdevelopmentwhosehardwaresupportslimitedamountsofFPGA-likereconfiguration.Indeed,justascomputersconnectedtotheInternetcannowautomaticallydownloadspecial-purposesoftwarecomponentstoperformparticulartasks,futuremachinesmightdownloadnewhardwareconfigurationsastheyareneeded.Computingdevices10yearsfromnowwillincludeastrongmixofsoftware-programmablehardwareandhardware-configurablelogic.[7]

1.?generalityn.普遍性，普通性，一般性。.

2.?versatile*adj.多才多藝的；多用途的或者多功能的；反復無常的；易變的。

3.?operation*n.操作運算；動作；運算[操作]指令。

4.?configurableadj.可配置的，結構的。Vocabulary

5.?tune*n.【音樂】曲調(diào)，尤指簡單的、易記的調(diào)子；準確的音高；和諧；融洽；【電子學】調(diào)諧調(diào)整接收器或電路以獲得對于給定的信號或頻率的最強反應v.tr.【音樂】調(diào)音使音高正確；使……和諧，調(diào)整或調(diào)節(jié)，尤指為了達到和諧一致【電子學】調(diào)整(接收器的頻率)、調(diào)諧(接收器)以達到希望的頻率；調(diào)整(電路)、調(diào)諧(電路)以使其與輸入的信號共振。

6.?ASICabbr.[電]專用集成電路。

7.?FPGAabbr.[電]現(xiàn)場可編程門陣列。

8.?coarseadj.粗糙的,粗鄙的。

9.?multipliern.乘法器，倍增器；乘式[MLPR]。

10.?swapvt.n.交換。

11.?framen.幀，畫面。

12.?templaten.標準框，樣板，模板；【軟】屬性單元，同templet[TEM]。

13.?thresholdn.閾，閾值，門限，門檻;地點,開端。

14.?pixeln.像素，像元，圖素。

15.?paralleladj.并行的，并聯(lián)的，平行[P]。

16.?scramblev.intr.爬，尤指用手和膝蓋迅速移動或攀爬；爭奪，為了得到某物而瘋狂地爭奪或者爭斗。v.tr.隨便地促在一起，偶然地混合或丟在一起；雜亂的收集，匆忙或無秩序地聚集在一起【電子學】擾頻打亂或擾亂無線電信號的頻率而使在無特殊儀器的情況下無法接收n.攀爬的動作或事例；爭奪，粗暴地爭奪或斗爭。

17.?confidential*adj.秘密的,機密的。

18.?schedule*n.圖表，目錄，清單；進度表；【動】調(diào)度。

19.?bank*n.(數(shù)據(jù))庫，集；簇；排，列，組，堆，區(qū)；存儲體；銀行。

[1]Computerdesignersfaceaconstantstruggletofindtherightbalancebetweenspeedandgenerality.Theycanbuildversatilechipsthatperformmanydifferentfunctionsrelativelyslowly,ortheycandeviseapplication-specificchipsthatdoonlyalimitedsetoftasksbutdothemmuchmorequickly.ImportantSentencesMicroprocessors(suchastheIntelPentiumorMotorolaPowerPCchipscommonlyfoundinpersonalcomputers)aregeneralpurpose:programminginstructionsencodedinbinaryformatcanleadamicroprocessorthroughvirtuallyanylogicalormathematicaloperationaprogrammercanconceive.TheIntelPentium,forexample,wasneverdesignedspecificallytoexecuteeitherMicrosoftWordorthecomputergameDOOM,butitcanrunboth.計算機設計者面臨著不斷地在速度和通用性之間找到合適的平衡點的問題。他們可以制造能完成多種不同的功能但速度比較慢的芯片，或設計出能完成有限任務但速度很快的專用芯片。微處理器(如個人電腦中常見的Intel的Pentium處理器和MotorolaPowerPC的芯片)都是通用的：經(jīng)編碼成二進制格式的程序指令實際上可以指導微處理器完成程序員想得到的所有邏輯或數(shù)學運算。例如Intel的Pentium處理器決不是專門設計來運行Word的，也不是專門為DOOM游戲而設計的，但是它可以運行這兩個程序。

[2]Incontrast,customhardwarecircuits,oftenknownasApplication-SpecificIntegratedCircuits(ASICs),providepreciselythefunctionalityneededforaspecifictask.BycarefullytuningeachASICtoagivenjob,thecomputerdesignercanproduceasmaller,cheaper,fasterchipthatconsumeslesspowerthanaprogrammableprocessor.AcustomgraphicschipforaPC,forinstance,candrawlinesorpaintpicturesonthescreen10or100timesasquicklyasageneral-purposecentralprocessingunitcan.

相反，定制的硬件電路，也經(jīng)常稱為專用集成電路，恰恰可以提供為完成某些特定任務所需的功能。通過針對給定的工作來細心調(diào)整專用集成電路，計算機設計者可以制造出更小、更便宜、更快且比可編程處理器消耗更少能量的芯片。一個專用的PC圖形(處理)芯片，可以用通用中央處理單元10倍甚至100倍的速度在屏幕上畫線和作圖。

[3]Anewdevelopmentinintegratedcircuitsoffersathirdoption:large,fast,field-programmablegatearrays,orFPGAs—highlytunedhardwarecircuitsthatcanbemodifiedatalmostanypointduringuse.FPGAsconsistofarraysofconfigurablelogicblocksthatimplementthelogicalfunctionsofgates.Logicgatesarelikeswitcheswithmultipleinputsandasingleoutput.TheyareusedindigitalcircuitstoperformbasicbinaryoperationssuchasAND,NAND,OR,NORandXOR.Inmosthardwarethatisusedincomputingtoday,thelogicalfunctionsofgatesarefixedandcannotbemodified.InFPGAs,however,boththelogicfunctionsperformedwithinthelogicblocksandtheconnectionsbetweentheblockscanbealteredbysendingsignalstothechip.TheseblocksarestructurallysimilartothegatearraysusedinsomeASICs,butwhereasstandardgatearraysareconfiguredduringmanufacture,theconfigurablelogicblocksinFPGAscanberewiredandreprogrammedrepeatedly,longaftertheintegratedcircuithasleftthefactory.集成電路的新發(fā)展提供了第三種選擇：大規(guī)模、高速度和現(xiàn)場可編程的門陣列，或者叫FPGA——經(jīng)過高度調(diào)整的，可以在使用過程中的任何時刻進行修改的硬件電路。現(xiàn)場可編程門陣列由可以實現(xiàn)邏輯門功能的可配置邏輯塊陣列組成。邏輯門就像多輸入單輸出的開關一樣，它們在數(shù)字電路中用來完成基本的二進制運算(如與、與非、或、或非和異或)。在當今大多數(shù)用于計算的硬件中，邏輯門的功能是固定不變的。但在現(xiàn)場可編程的門陣列中，不但邏輯塊可完成邏輯功能，而且邏輯塊之間的連接都可以通過向芯片送信號來改變。這些邏輯塊的結構和某些專用集成電路中的門陣列類似，但標準門陣列在生產(chǎn)的時候就被配置好了，而現(xiàn)場可編程的門陣列中的邏輯塊可以在集成電路出廠后很長時間里反復重新布線和重新編程。

[4]Computingdevicescanmakeuseofconfigurableelementsinmanydifferentways.Theleastdemandingtechniqueistoswitchbetweenfunctionsoncommand—thehardwareequivalentofquittingoneprogramandthenrunninganother.Slowreconfiguration,ontheorderofseveralseconds,maywellbeacceptableinsuchanapplication.Fasterprogrammingtimespermitdynamicdesignswapping:asingleFPGAperformsaseriesoftasksinrapidsuccession,reconfiguringitselfbetweeneachone.Suchdesignsoperatethechipinatime-sharingmodeandswapbetweensuccessiveconfigurationssorapidlythatitappearstheFPGAisperformingallitsfunctionsatonce.計算裝置可從多方面利用可配置元件。最基本的技術就是在不同命令下實現(xiàn)功能的轉換，即退出一個程序后運行另一個程序?qū)挠布幼鳌酌腌姇r間的慢速重配置在這種應用中是完全可以接受的。更快的編程使動態(tài)設計交換技術成為可能：單個現(xiàn)場可編程的門陣列完成一系列相繼的任務，在任務之間重新配置自己。這種設計為分時式操作芯片，在相繼的配置間的轉換速度很快，給人的感覺好像它同時完成了多個功能。

[5]Oneofthemostpromisingapplicationsforconfigurablecomputinginvolvespatternmatching.Patternmatchingisusedintaskssuchashandwritingrecognition,faceidentification,databaseretrievalandautomatictargetrecognition.Afundamentaloperationofpatternmatchinginvolvescomparinganinputsetofbits(representinganimage,astringofcharactersorotherdata)withasetoftemplatescorrespondingtothepossiblepatternstoberecognized.Thesystemdeclaresrecognitionwhenthenumberofinputbitsthatmatchbitsinthetemplateexceedssomethreshold.可配置計算最有前途的應用之一包括模式匹配。模式匹配可用于手寫輸入識別、面容識別、數(shù)據(jù)庫檢索和自動目標識別等。模式匹配的基本運算包括把輸入的一組比特值(代表一幅圖、一串字符或其他數(shù)據(jù))與一組對應于可能被識別的模式的模板相比較。當與模板中的比特匹配的輸入比特的數(shù)量超過一個門限值時，系統(tǒng)將認為識別成功。

[6]Academicresearchersandmanufacturersareovercomingnumerousotherdesignlimitationsthathavehinderedtheadoptionofconfigurablecomputing.Notallcomputationscanbeimplementedefficientlywithtoday’sFPGAs:theyarewellsuitedtoalgorithmscomposedofbit-leveloperations,suchaspatternmatchingandintegerarithmetic,buttheyareillsuitedtonumericoperations,suchashigh-precisionmultiplicationorfloating-pointcalculations.DedicatedmultipliercircuitssuchasthoseusedinmicroprocessoranddigitalsignalchipscanbeoptimizedtoperformmoreefficientlythanmultipliercircuitsconstructedfromconfigurablelogicblocksinanFPGA.Furthermore,FPGAscurrentlyprovideverylittleon-chipmemoryforstorageofintermediateresultsincomputations;thus,manyconfigurablecomputingapplicationsrequirelargeexternalmemories.ThetransferofdatatoandfromtheFPGAincreasespowerconsumptionandmayslowdownthecomputations.理論研究者和生產(chǎn)廠商正在試圖克服大量其他阻礙采用可配置計算的設計限制。并不是所有的計算都可以在與今日的現(xiàn)場可編程門陣列相結合的情況下能有效地實現(xiàn)：它們可以很好地適用于包含位運算的運算法則，如模式匹配和整數(shù)運算，但并不適用于數(shù)字的運算，如高精度的乘法或浮點運算。例如用于微處理器和數(shù)字信號處理芯片的專用乘法器電路，在優(yōu)化后能夠比現(xiàn)場可編程門陣列中可配置邏輯塊構成的乘法器電路更加高效地運行。此外，當前的現(xiàn)場可編程門陣列幾乎不能提供集成在芯片上的內(nèi)存來存儲計算的中間結果；因此，很多可配置計算的應用要求大量的外存。對現(xiàn)場可編程門陣列數(shù)據(jù)的來回傳輸增加了功耗，同時會降低計算速度。

[7]Inaddition,thelinebetweenprogrammableprocessorsandFPGAswillbecomelessdistinct:futuregenerationsofFPGAswillincludefunctionssuchasincreasedlocalmemoryanddedicatedmultipliersthatarestandardfeaturesoftoday’smicroprocessors;therearealsonext-generationmicroprocessorsunderdevelopmentwhosehardwaresupportslimitedamountsofFPGA-likereconfiguration.Indeed,justascomputersconnectedtotheInternetcannowautomaticallydownloadspecial-purposesoftwarecomponentstoperformparticulartasks,futuremachinesmightdownloadnewhardwareconfigurationsastheyareneeded.Computingdevices10yearsfromnowwillincludeastrongmixofsoftware-programmablehardwareandhardware-configurablelogic.除此之外，可編程處理器和現(xiàn)場可編程門陣列的界限變得更加不清晰：未來幾代現(xiàn)場可編程的門陣列將包含更多的功能，諸如越來越大的內(nèi)部存儲器和當今微處理器才有的專用乘法器等；同時將會出現(xiàn)正在開發(fā)中的下一代微處理器，其硬件在一定范圍內(nèi)支持像現(xiàn)場可編程門陣列一樣的重配置。事實上，正如網(wǎng)絡上的計算機可以自動下載專用軟件組件來完成特定的任務一樣，未來的機器也可以在需要時下載新的硬件配置。10年后的計算裝置將會把如同軟件一樣可編程的硬件和硬件可配置邏輯有力地結合在一起。

1.Accordingtothecontentbefore“ProgrammableCircuitry”,answerthefollowingquestions.

(1)?Whatproblemhasbotheredforcomputerdesignersforquitealongtime?()

A.?Balancebetweencostandfunctionality.

B.?Balancebetweenstabilityandpracticality.

C.?Balancebetweenspeedandgenerality.

D.?Allofthem.QuestionsandAnswers

(2)?Whichofthefollowingsisakindofmicroprocessorinthepassage?()

A.?DOOM.

B.?MotorolaPowerPCchips.

C.?MicrosoftWord.

D.?ASIC.

(3)?WhichofthefollowingsayingsisTrue?()

A.?IntelPentiumcanrunMicrosoftWordandthecomputergameDOOM.

B.?IntelPentiumcanrunMicrosoftWordbutnotDOOM.

C.?IntelPentiumcanrunDOOMbutnotMicrosoftWord.

D.?IntelPentiumcanrunneitherMicrosoftWordnorDOOM.

(4)?WhichofthefollowingsisnotafeatureofASIC?()

A.?Fast.

B.?Energy-saving.

C.?Small.

D.?Slow.

(5)?WhatproblemofASICshouldbesolved?()

A.?Toospecialized.

B.?Tooslow.

C.?Tooexpensive.

D.?Allofthem.

2.Accordingtothecontentbetween“ProgrammableCircuitry”and“CuttingCriticalHardware”,answerthefollowingquestions.

(1)?Whatisthethirdoptionofferedbythenewdevelopmentinintegratedcircuits?()

A.?Versatilemicroprocessor.

B.?ASIC.

C.?FPGA.

D.?Specializedmicroprocessor.

(2)?WhatisthemoststrikingadvantageofFPGAoverASIC?()

A.?Itcanberewiredandreprogrammed.

B.?Itcanrunmuchfaster.

C.?Itismuchsmaller.

D.?Itismuchcheaper.

(3)?Whatmakesconfigurablecomputingpossible?()

A.?Versatilemicroprocessor.

B.?ASIC.

C.?FPGA.

D.?Specializedmicroprocessor.

(4)?HowfastcanFPGAsbeconfigurednow?()

A.?Seconds.

B.?Milliseconds.

C.?Microseconds.

D.?Nanoseconds.

(5)?WhatisthebasicstructureofaFPGAdesign?()

A.?Configurablelogicblocks.

B.?Aprogrammablegridofconnections.

C.?Programmableprocessor.

D.?AandB.

(6)?WhichofthefollowingstatementsisWrong?()

A.?Acoarse-grainedFPGAmightbecapableofaddingorcomparingtwonumbers.

B.?Afine-graineddevicemightbecapableonlyofcomparingtwobinarydigits.

C.?Oneblockinafine-graineddevicemightonlybeasinglelogicgate.

D.?Coarse-grainedFPGAsarelesswidelyusedthanfine-graineddevices.

(7)?WhichofthefollowingsayingsisWrong?()

A.?Dynamicdesignswappingoperatesthechipinatime-sharingmode.

B.?Dynamicdesignswappingswapsbetweensuccessiveconfigurationsrapidly.

C.?Dynamicdesignswappin