數(shù)字電子電路課程設(shè)計(jì)數(shù)字鐘

1、指導(dǎo)老師：安亞軍學(xué)生姓名：李雙達(dá)學(xué) 號(hào)：084119專 業(yè)：電子信息工程班 級(jí)：電子Z082系 別：電子系目 錄一. 概述1二. 設(shè)計(jì)要求和任務(wù)1三. 主要實(shí)驗(yàn)器材1四. 設(shè)計(jì)原理及頂層原理圖.1五. 各部分電路的設(shè)計(jì)及實(shí)現(xiàn)2六. 下載與調(diào)試11七. 收獲與體會(huì)11數(shù)字鐘電路的設(shè)計(jì)一、 概述數(shù)字鐘已成為人們?nèi)粘Ｉ钪胁豢缮俚谋匦杵?，給人們的生活，學(xué)習(xí)，工作帶來極大的方便。本次課程設(shè)計(jì)的數(shù)字鐘是一種利用EDA來設(shè)計(jì)的顯示時(shí)、分的裝置，與傳統(tǒng)的機(jī)械鐘相比，它具有走時(shí)準(zhǔn)確，性能穩(wěn)定，顯示直觀，無機(jī)械傳動(dòng)裝置等特點(diǎn)。此外，本數(shù)字鐘還具有整點(diǎn)報(bào)時(shí)、調(diào)時(shí)、定時(shí)響鬧功能、秒鐘的花樣顯示、動(dòng)態(tài)掃描顯示。二、

2、設(shè)計(jì)要求和任務(wù)1、具有時(shí)、分顯示功能（用數(shù)碼管顯示）。以二十四小時(shí)循環(huán)計(jì)時(shí)。2、具有清零、使能，調(diào)節(jié)小時(shí)，分鐘的功能。3、具有整點(diǎn)（正小時(shí)）報(bào)時(shí)同時(shí)用多顆LED燈花樣顯示秒的功能。4、運(yùn)用多層次化設(shè)計(jì)方式，底層元件用VHDL編寫，頂（最高）層元件用原理圖法連線5、電路具有定時(shí)響鬧功能。6、靜態(tài)數(shù)碼管的顯示為動(dòng)態(tài)掃描方式。三、 主要實(shí)驗(yàn)器材試驗(yàn)箱一個(gè)；PC機(jī)一臺(tái)。四、設(shè)計(jì)原理及方框圖數(shù)字鐘實(shí)際上是一個(gè)對(duì)標(biāo)準(zhǔn)頻率進(jìn)行計(jì)數(shù)的計(jì)數(shù)電路，由于計(jì)數(shù)的起始時(shí)間不可能與標(biāo)準(zhǔn)時(shí)間（如北京時(shí)間）一致，故需要在設(shè)計(jì)時(shí)加上調(diào)時(shí)間裝置，同時(shí)標(biāo)準(zhǔn)的1HZ時(shí)間信號(hào)必須做到準(zhǔn)確穩(wěn)定所以沒有采用分頻器得到而是由另一個(gè)時(shí)鐘信號(hào)輸

3、入這樣硬件調(diào)試時(shí)也可以任意改變加快秒的基準(zhǔn)加快時(shí)間進(jìn)程。另外采用了分頻器得到一個(gè)掃描頻率對(duì)靜態(tài)數(shù)碼管的顯示實(shí)現(xiàn)了動(dòng)態(tài)掃描顯示，構(gòu)成頂層原理圖如下：由圖可見：本數(shù)字鐘電路主要由時(shí)鐘信號(hào)、各控制端、分頻器、時(shí)分秒計(jì)數(shù)器（內(nèi)含調(diào)時(shí)預(yù)置鬧鐘功能）、動(dòng)態(tài)掃描電路及整點(diǎn)報(bào)時(shí)電路、秒的花樣顯示電路構(gòu)成。它們的工作原理是：由CLK脈沖信號(hào)作為數(shù)字鐘的時(shí)間基準(zhǔn)，秒計(jì)數(shù)器采用60進(jìn)制計(jì)數(shù)器，每累計(jì)60秒發(fā)出一個(gè)“分脈沖”信號(hào)，該信號(hào)作為分計(jì)數(shù)器的脈沖信號(hào)，分計(jì)數(shù)器也采用60進(jìn)制計(jì)數(shù)器，每累計(jì)60分鐘發(fā)出一個(gè)“時(shí)脈沖”信號(hào)，該信號(hào)將被送到時(shí)計(jì)數(shù)器，時(shí)計(jì)數(shù)器采用24進(jìn)制計(jì)數(shù)器。動(dòng)態(tài)掃描顯示電路將時(shí)、分計(jì)數(shù)器的輸出狀態(tài)

4、送到數(shù)碼管顯示器。整點(diǎn)報(bào)時(shí)電路則根據(jù)計(jì)時(shí)系統(tǒng)的輸出狀態(tài)產(chǎn)生一脈沖信號(hào)，然后去觸發(fā)揚(yáng)聲器實(shí)現(xiàn)報(bào)時(shí)并讓三顆LED燈同時(shí)點(diǎn)亮；定時(shí)鬧鐘由指定時(shí)刻發(fā)出的信號(hào)，驅(qū)動(dòng)音樂電路。并有十顆LED燈根據(jù)秒的個(gè)位輸出花樣顯示，最后一顆LED直接接到CLK顯示秒。County60：秒計(jì)數(shù)器；coutm60:含有調(diào)時(shí)鬧鐘分計(jì)數(shù)器；cout24：含有調(diào)時(shí)鬧鐘時(shí)計(jì)數(shù)器；miaohua:秒的花樣顯示；DTSM：動(dòng)態(tài)掃描電路；P5分頻器；zhengdiandeng:整點(diǎn)LED燈顯示；music:音樂模塊；ALERT：整點(diǎn)報(bào)時(shí)模塊；五、 各部分電路的設(shè)計(jì)及實(shí)現(xiàn)1County60：秒計(jì)數(shù)器LIBRARY IEEE;ENTITY

5、COUNT60 ISPORT(ci:IN STD_LOGIC;nreset:IN STD_LOGIC;load:IN STD_LOGIC;d:in STD_LOGIC_VECTOR(7 DOWNTO 0);CLK:IN STD_LOGIC;co:out STD_LOGIC;qh:buffer STD_LOGIC_VECTOR( 3 DOWNTO 0);ql:buffer STD_LOGIC_VECTOR( 3 DOWNTO 0);END COUNT60;ARCHITECTURE BEHA OF COUNT60 ISbeginco<='1'when(qh="010

6、1"and ql="1001"and ci='1')else '0'PROCESS(CLK,nreset)BEGINif(nreset='0')thenqh<="0000"ql<="0000"elsIF(CLK'EVENT AND CLK='1') THENif(load='1')thenqh<=d(7 downto 4);ql<=d(3 downto 0);elsif(ci='1')thenif(

7、ql=9)thenql<="0000"if(qh=5)thenqh<="0000"elseqh<=qh+1;end if;elseql<=ql+1;end if;end if;end if;end process;end beha;2coutm60:含有調(diào)時(shí)鬧鐘分計(jì)數(shù)器LIBRARY IEEE;ENTITY coutm60 ISPORT(ci:IN STD_LOGIC;reset:IN STD_LOGIC;load:IN STD_LOGIC;enb:IN STD_LOGIC;d:IN STD_LOGIC_VECTOR(7 DOWN

8、TO 0);clk:IN STD_LOGIC;co:OUT STD_LOGIC;mn:OUT STD_LOGIC;qh:BUFFER STD_LOGIC_VECTOR(3 DOWNTO 0);ql:BUFFER STD_LOGIC_VECTOR(3 DOWNTO 0);END coutm60;ARCHITECTURE behave OF coutm60 ISSIGNAL m:STD_LOGIC_VECTOR(3 DOWNTO 0):="1111"SIGNAL n:STD_LOGIC_VECTOR(3 DOWNTO 0):="1111"BEGINco<

9、;='1'WHEN(qh="0101" AND ql="1001" AND ci='1')ELSE'0'mn<='1'WHEN(qh=m(3 DOWNTO 0)AND ql=n(3 DOWNTO 0)AND n/="0000" AND reset='0' AND load='0')ELSE'0'PROCESS(clk,reset)BEGINIF(reset='1')THENqh<="00

10、00"ql<="0000"ELSIF(clk'EVENT AND clk='1')THENIF(load='1')THENIF(enb='0')THENqh<=d(7 DOWNTO 4);ql<=d(3 DOWNTO 0);ELSEm<=d(7 DOWNTO 4);n<=d(3 DOWNTO 0);END IF;ELSIF(ci='1')THENIF(ql=9)THENql<="0000"IF(qh=5)THENqh<="

11、0000"ELSEqh<=qh+1;END IF;ELSEql<=ql+1;END IF;END IF;END IF;END PROCESS;END behave;3cout24：含有調(diào)時(shí)鬧鐘時(shí)計(jì)數(shù)器LIBRARY IEEE;ENTITY cout24 ISPORT(ci:IN STD_LOGIC;reset:IN STD_LOGIC;load:IN STD_LOGIC;enb:IN STD_LOGIC;d:IN STD_LOGIC_VECTOR(7 DOWNTO 0); clk:IN STD_LOGIC;co:OUT STD_LOGIC;mn:OUT STD_LOGIC

12、;qh:BUFFER STD_LOGIC_VECTOR(3 DOWNTO 0); ql:BUFFER STD_LOGIC_VECTOR(3 DOWNTO 0);END cout24;ARCHITECTURE behave OF cout24 ISSIGNAL m:STD_LOGIC_VECTOR(3 DOWNTO 0);SIGNAL n:STD_LOGIC_VECTOR(3 DOWNTO 0);BEGINco<='1'WHEN(qh="0010" AND ql="0011" AND ci='1')ELSE'0

13、'mn<='1'WHEN(qh=m(3 DOWNTO 0)AND ql=n(3 DOWNTO 0)AND reset='0'AND load='0')ELSE'0'PROCESS(clk,reset)BEGINIF(reset='1')THENqh<="0000"ql<="0000"ELSIF(clk'EVENT AND clk='1')THENIF(load='1')THENIF(enb='0'

14、;)THENqh<=d(7 DOWNTO 4);ql<=d(3 DOWNTO 0);ELSEm<=d(7 DOWNTO 4);n<=d(3 DOWNTO 0);END IF;ELSIF(ci='1')THENIF(qh=0 OR qh=1)THENIF(ql=9)THENql<="0000"qh<=qh+1;ELSEql<=ql+1;END IF;ELSIF(qh=2)THENIF(ql=3)THENql<="0000"qh<="0000"ELSEql<=ql

15、+1;END IF;END IF;END IF;END IF;END PROCESS;END behave;4miaohua:秒的花樣顯示library ieee;port(en: in std_logic;gewei: in std_logic_vector(3 downto 0); led:out std_logic_vector(9 downto 0) ); end miaohua;architecture behave of miaohua issignal q:std_logic_vector(9 downto 0); beginprocess(en,gewei)beginif en

16、= '1'thencase gewei iswhen"0000"=>q<="0000000001" when"0001"=>q<="0000000011" when"0010"=>q<="0000000111" when"0011"=>q<="0000001111" when"0100"=>q<="0000011111"

17、when"0101"=>q<="0000111111" when"0110"=>q<="0001111111" when"0111"=>q<="0011111111" when"1000"=>q<="0111111111" when"1001"=>q<="1111111111" when others => null;end cas

18、e;elseq<="0000000000"end if;led<=q;end process;end behave;5P5分頻器library ieee;entity p5 isport(clk_in :in std_logic;-input clk 50MHzclk_o:out std_logic);-輸出clkend p5;architecture behav of p5 issignal clko:std_logic:='0'signal cnt:integer range 0 to 5;beginprocess(clk_in)begini

19、f clk_in'event and clk_in='1' thenif cnt = 4 thencnt<=0;clko<=not clko; -10分頻elsecnt<=cnt+1;end if;end if;end process;clk_o<=clko;end behav;6DTSM：動(dòng)態(tài)掃描電路LIBRARY IEEE;ENTITY dtsm ISPORT ( CLK : IN STD_LOGIC;MIN1,MIN0,H1,H0:IN STD_LOGIC_VECTOR(3 DOWNTO 0);q1,q2,q3,q4 : OUT STD_L

20、OGIC_VECTOR(3 DOWNTO 0) );-位控制信號(hào)輸出END dtsm ;ARCHITECTURE one OF dtsm ISSIGNAL CNT4 : STD_LOGIC_VECTOR(1 DOWNTO 0);BEGINP1: process(CNT4)BEGINCASE cnt4 ISWHEN"00"=>Q1<=MIN0;q2<="0000"q3<="0000"q4<="0000"WHEN"01"=>Q2<=MIN1;q1<=&

21、quot;0000"q3<="0000"q4<="0000"WHEN"10"=>Q3<=H0; q2<="0000"q1<="0000"q4<="0000"WHEN"11"=>Q4<=H1; q2<="0000"q3<="0000"q1<="0000"WHEN OTHERS=>null;END CASE;END

22、 PROCESS P1;P2:process(clk)beginif( clk'EVENT AND clk='1')THENCNT4<=CNT4+1;END IF;END PROCESS P2;END one;7. zhengdiandeng:整點(diǎn)LED燈顯示lIBRARY IEEE;ENTITY zhengdiandeng ISPORT (clkco: IN STD_LOGIC;deng : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);END zhengdiandeng;ARCHITECTURE ONE OF zhengdiandeng I

23、Ssignal denga :STD_LOGIC_VECTOR(2 DOWNTO 0);BEGINprocess(clkco)begincase clkco iswhen '1'=>denga<="111"when others=>denga<="000"end case;end process;deng <=denga;end one;8ALERT：整點(diǎn)報(bào)時(shí)library ieee;entity ALERT isport(m1,m0,s1,s0:in std_logic_vector(3 downto 0)

24、;-輸入秒、分高/低位信號(hào)clk:in std_logic;-高頻聲控制q500,qlk:out std_logic);-低頻聲控制end ALERT;architecture sss_arc of ALERT isbeginprocess(clk)beginif clk'event and clk='1' thenif m1="0101" and m0="1001" and s1="0101" then-當(dāng)秒高位為5，低位為9時(shí)且分高位為5if s0="0001" or s0="0011" or s0="0101" or s0="0111" then-當(dāng)分的低位為1或3或5或7時(shí)q500<='1'-低頻輸出為1elseq500<='0'-否則輸出為0end if;end if;if m1="0101" and m0="1001" and s1="01