DSP-F2812輸入捕捉例程(共3頁)

1、/* 由于本開發(fā)板的DSP內(nèi)核的電壓為1.8V，故只能運(yùn)行在最高位135MHZ的時(shí)鐘頻率下 將T1PWM_GPIOA6輸出的PWM波與DSP的CAP1Q1_GPIOA8輸入捕捉相接來測(cè)試輸入捕捉功能 將輸入捕捉到的定時(shí)器的計(jì)數(shù)值之差,也就是兩個(gè)上升沿之間的時(shí)間通過8個(gè)發(fā)剛二極管顯示出來。 注意：在開發(fā)板斷電的情況下連接好兩個(gè)引腳，然后再給開發(fā)板上電！*/#includeDSP28_Device.hinterrupt void cap1_isr(void);Uint16 *LED8 = (Uint16 *)0x4100;/這是DSP開發(fā)板上的CPLD控制發(fā)光二級(jí)管的地址Uint16 cap_va

2、lue2=0;void main(void)InitSysCtrl();DINT;IER = 0x0000;IFR = 0x0000;InitPieCtrl();/*初始化PIE中斷矢量表*/InitPieVectTable();EALLOW;PieVectTable.CAPINT1 = &cap1_isr;EDIS;/*通用定時(shí)器1設(shè)置*/EvaRegs.GPTCONA.bit.T1PIN = 1;/*effective is low*/EvaRegs.GPTCONA.bit.TCOMPOE = 1;/*open compare output*/EvaRegs.T1CON.bit.FREE

3、= 1;/*freely run*/EvaRegs.T1CON.bit.TMODE = 2;EvaRegs.T1CON.bit.TPS = 2;/*prescaler is 4,HSPCLK = 60MHZ,pwm frequency = 150KHZ*/EvaRegs.T1PR = 99;EvaRegs.T1CMPR = 50;EvaRegs.T1CON.bit.TENABLE = 1;EvaRegs.T1CON.bit.TCLD10 = 0;EvaRegs.T1CON.bit.TECMPR = 1;/*通用定時(shí)器2設(shè)置*/EvaRegs.T2PR = 0xffff;EvaRegs.T2CO

4、N.bit.FREE = 1;/*freely run*/EvaRegs.T2CON.bit.TMODE = 2;EvaRegs.T2CON.bit.TPS = 1;/*prescaler is 2,HSPCLK = 60MHZ,frequency is 30MHZ*/EvaRegs.T2CON.bit.TENABLE = 1;EvaRegs.T2CON.bit.TCLD10 = 3;/*保留*/EvaRegs.T2CON.bit.TECMPR = 1;/*捕獲單元設(shè)置*/EvaRegs.CAPFIFO.bit.CAP1FIFO = 0;EvaRegs.CAPCON.bit.CAP12TSEL

5、 = 0; /*choose the general timer2*/EvaRegs.CAPCON.bit.CAP1EDGE = 2;/*detect the falling edge*/EvaRegs.CAPCON.bit.CAPRES = 1;EvaRegs.CAPCON.bit.CAPQEPN = 1;/*enable capture uint 1 and 2*/EvaRegs.EVAIFRC.bit.CAP1INT = 1;/*clear the flag*/EvaRegs.EVAIMRC.bit.CAP1INT = 1;/*enable the interrupt*/EALLOW;G

6、pioMuxRegs.GPAMUX.bit.T1PWM_GPIOA6 = 1;GpioMuxRegs.GPAMUX.bit.CAP1Q1_GPIOA8 = 1;/*second function*/EDIS;PieCtrl.PIEIER3.bit.INTx5 = 1;IER |= M_INT3;EINT;ERTM;*LED8 = 0xff;for(;)interrupt void cap1_isr(void)EvaRegs.EVAIFRC.bit.CAP1INT = 1;EvaRegs.T1CNT = 0;cap_value0 = EvaRegs.CAP1FIFO;cap_value1 = EvaRegs.CAP1FIFO;*LED8 = (char)( cap_value1 - c